Low Power Standard Cell Library Design For Application Specific Integrated Circuit

With the expansion of portable and wireless electronics product in the current market demand, the focus of designing VLSI system has shifted from high speed to low power domain. This requires chip designers to minimize power consumption at all design level such as system, algorithm, architecture, circuit and technology. The objective of this work is to develop low power CMOS standard cell library to be used in application specific integrated circuit (ASIC) design flow. The design methodology focuses on all aspect of circuit design: transistor size, logic style, layout style, cell topology, and circuit design for minimum power consumption. The standard cell library is targeted for general-purpose application, especially in microprocessor design. For rapid design implementation, the library is designed to be used together with the commercial logic synthesis and automatic cell placement and routing tools. Results show that the microprocessor targeted to the low power library gives 44% power saving compared to the conventional library, with both designs operate at the same clock frequency of 50MHz

SOC integration for video processing application

Video processing is an additional system that can improve the functionality of video surveillance. Integration of a simple video processing system into a complete camera system with a field-programmable gate array (FPGA) is an important step for research, to further improve the tracking process. This paper presents the integration of greyscale conversion into a complete camera system using Nios II software build tools for Eclipse. The camera system architecture is designed using the Nios II soft-core embedded processor from Altera. The proposed greyscale conversion system is designed using the C programming language in Eclipse. Parts of the architecture design in the camera system are important if greyscale conversion is to take place in the processing, such as synchronous dynamic random-access memory (SDRAM) and a video decoder driver. The image or video is captured using a Terasic TRDB-D5M camera and the data are converted to RGB format using the video decoder driver. The converted data are shown in binary format and the greyscale conversion system extracts and processes the data. The processed data are stored in the SDRAM before being sent to a VGA monitor. The camera system and greyscale conversion system were developed using the Altera DE2-70 development platform. The data from the video decoder driver and SDRAM were examined to confirm that the data conversion matched greyscale conversion formulae. The converted data in the SDRAM correctly displayed the greyscale image on a VGA monitor

Performance analysis of low-complexity welch power spectral density for automatic frequency analyser

The aim of this paper is to investigate the performance of the Low Complexity Welch Power Spectral Density Computation (PSDC). This algorithm is an improvement from Welch PSDC method to reduce the computational complexity of the method. The effect of the sampling rate and the input frequency toward to accuracy of frequency detection is being evaluated. From the experiment results, sampling rate nearest to the twice of the input frequency provides the highest accuracy which achieved 99%. The ability of the algorithm to perform complex signal also has been investigated

Performance comparison of automatic peak detection for signal analyser

The aim of this paper is to propose a new peak detection method for a portable device, which know as modified automatic threshold peak detection (M-ATPD). M-ATPD evolves out of ATPD with a focus on reducing computational time. The proposed method replaces the clustering threshold calculation in ATPD with a standard deviation threshold calculation. M-ATPD reduces computational time by 2 times faster compared to ATPD for control signal and 8.65 times faster compared to ATPD for raw biosignals. Modified ATPD also shows a slight improvement in terms of detection error, with a decrease of about 6.66% to 13.33% in peak detection of noise signals. Modified ATPD successfully fixes the error of peak detection on pulse control signals associated with ATPD.  For raw biosignals, in total M-ATPD achieved 19.41% lower detection error compare to ATPD

Heart-rate Monitoring System Design and Analysis Using a Nios II Soft-core Processor

The heart rate of a person is able to tell whether they are healthy. A heart-rate monitoring device is able to measure or record the heart rate of a person in real time, whether it is an electrocardiogram (ECG) or a photoplethysmogram (PPG). In this work, a microprocessor system loaded with a heart-rate monitoring algorithm is implemented. The microprocessor system is the Nios II processor system, which interfaces with an analogue-to-digital converter (ADC) and a pulse sensor. A beat-finding algorithm is used in the microprocessor system for heart rate measurement. An experiment is carried out to analyse the functionality of the microprocessor system loaded with the algorithm. The results show that the detected heart rate is in the range of the average human being’s heart rate. The signal flow within the microprocessor system is observed and analysed using SignalTap II from Quartus’ software. Based on a power analysis report, the proposed microprocessor system has a total power dissipation of around 218.26 mW

Enhancement of DNA microarray images using mathematical morphological image processing

DNA microarray images contain spots that represent the gene expression of normal and cancer samples. As there are numerous spots on DNA microarray images, image processing can help in enhancing an image and assisting analysis. The mathematical morphology is proposed to enhance the microarray image and analyse noise removal on the image. This follows an experiment in which the erosion, dilation, opening, closing, white top-hat (WTH) and black top-hat (BTH) operations were applied on a DNA microarray image and its results analysed. Noise was completely removed by the erosion operation and the images were enhanced

Interframe Bus Encoding Technique and Architecture for MPEG-4 AVC/H.264 Video Compression

In this paper, we propose an implementation of a data encoder to reduce the switched capacitance on a system bus. Our technique focuses on transferring raw video data for multiple reference frames between off-and on-chip memories in an MPEG-4 AVC/H.264 encoder. This technique is based on entropy coding to minimize bus transition. Existing techniques exploit the correlation between neighboring pixels. In our proposed technique, we exploit pixel correlation between two consecutive frames. Our method achieves a 58% power saving compared to an unencoded bus when transferring pixels on a 32-b off-chip bus with a 15-pF capacitance per wire

Performance comparison of image normalisation method for DNA microarray data

Normalisation is a process of removing systematic variation that affects measured gene expression levels in microarray experiment. The purpose is to get a more accurate DNA microarray result by deleting the systematic errors that may have occurred when making the DNA microarray slid. In this paper, four normalisation methods of Global, Lowess, Quantile and Print-tip are discussed, tested and their final results compared in the form of Matrixes and graphs. Ideal and real microarray slides have been used for this project. It was found that the Print-tip normalisation method showed the closest results to the real result for an ideal microarray slide and it has a straight median line final graph. The Print-tip normalisation method uses more than one normalization factor that is divided among intervals which are dependent on the values of the addition of red and green logarithm

A Novel Clinical Decision Support System Using Improved Adaptive Genetic Algorithm for the Assessment of Fetal Well-Being

A novel clinical decision support system is proposed in this paper for evaluating the fetal well-being from the cardiotocogram (CTG) dataset through an Improved Adaptive Genetic Algorithm (IAGA) and Extreme Learning Machine (ELM). IAGA employs a new scaling technique (called sigma scaling) to avoid premature convergence and applies adaptive crossover and mutation techniques with masking concepts to enhance population diversity. Also, this search algorithm utilizes three different fitness functions (two single objective fitness functions and multi-objective fitness function) to assess its performance. The classification results unfold that promising classification accuracy of 94% is obtained with an optimal feature subset using IAGA. Also, the classification results are compared with those of other Feature Reduction techniques to substantiate its exhaustive search towards the global optimum. Besides, five other benchmark datasets are used to gauge the strength of the proposed IAGA algorithm